My 2-layer to 4-layer learning path

For someone who is comfortable with 2-layer boards in KiCad and has never done 4 layers. Everything below is a verified link. Total core viewing: ~9 hours.

1. KiCad or Altium — the honest answer

Stay in KiCad for this board. Learn Altium after it flies.

Altium is genuinely a better tool. Its interactive router, constraint manager, multi-channel design and library management are all ahead of KiCad, and it is what most hardware companies in aerospace actually use — so learning it is a good career investment.

None of that helps you here.

The real argument: your first 4-layer board with an RF trace already introduces stackup, impedance, plane management and return-current reasoning — four new concepts. Adding "and I am also learning where the buttons are" doubles the number of things that can go wrong, on a project with a shipping round-trip to Uzbekistan in the critical path.

The concepts are what matter, and they transfer completely. Phil's Lab teaches the same material in both tools, so you can watch an Altium video and apply it in KiCad without difficulty.

When you do want Altium:

• Altium Student Lab — free licence — free for enrolled students with a university email
• Altium Education FAQs — eligibility and renewal
• Fedevel free Altium tutorial for beginners — Robert Feranec's free course
• Phil's Lab #41 — STM32 PCB in Altium + JLCPCB — the same board type you are building, in Altium

Do this after the WIT board is ordered, as a second pass on a simple project.

2. What actually changes going from 2 to 4 layers

Short list, because it is shorter than people expect:

1. You now have a reference plane. Every signal has continuous ground beneath it. This is the entire benefit and the entire responsibility.
2. Impedance becomes a real, calculable number. Trace width plus dielectric height gives you a defined impedance. On 2 layers you were ignoring this and mostly getting away with it.
3. You must think about which plane a signal references, and never let a trace cross a gap in that plane.
4. Power becomes polygons on L3, not traces.
5. Via count goes up — every layer change needs one, and every ground pin wants its own.

That is it. Routing itself is easier than 2-layer, not harder, because you stop weaving around traces.

The one habit to unlearn: on 2-layer boards you probably poured ground on the bottom and treated it as "good enough." On 4 layers the plane is sacred. Cut it once and you have undone the reason you paid for four layers.

3. Watch in this order

Stage A — 4-layer mechanics (1 hour)

Stage B — grounding and return current (2.5 hours) ⭐ THE MOST IMPORTANT ONE

If you watch one thing on this list, make it this. Everything in the grounding section of pcb/stackup_and_layout.md is downstream of this lecture.

Stage C — the board you are actually building (3 hours)

Stage D — impedance and RF (2 hours)

Stage E — power layout (45 min)

4. Channels worth subscribing to

There is also a community-compiled Phil's Lab learning path that sequences his videos beginner-to-advanced.

5. Books, if you want depth

You do not need any of these to build this board. Buy Ott if you intend to keep doing hardware.

6. Do this before you lay out the real board

Build a practice board first. Not optional — this is how you convert watching into knowing.

1. Follow Phil's Lab #65 exactly, building his board alongside the video in KiCad. Do not skip ahead or "just watch." 2–3 evenings.
2. Then do a throwaway 4-layer exercise of your own: an STM32F407 with two sensors, a buck-boost, and one U.FL connector with a 50 Ω trace. 60 × 60 mm. Do not order it. The point is to make every mistake once, cheaply.
3. Check your practice board against §4 of pcb/stackup_and_layout.md — display L2 alone, display the RF net alone. See whether your instincts produced an unbroken plane.
4. Only then start the WIT layout.

This costs you roughly a week and it is the cheapest week in the project. A respin costs three.

7. What not to spend time on

Things that look important and are not, for this board:

• Differential pair length matching. Your fastest signal is USB full-speed at 12 Mbps. Length matching matters above ~100 Mbps. Route them together, keep them reasonable, move on.
• Via stitching everywhere at calculated spacing. Along the RF trace it matters. Everywhere else, every 5–10 mm by eye is fine.
• Simulation. No SPICE, no field solver, no EM simulation. You have one short RF trace and a module with a certified front end. The KiCad calculator is sufficient.
• Impedance-controlled fabrication. Costs money and lead time. Not needed for a 15 mm trace — see the stackup document.
• Learning Altium now. Covered above.
• Teardrops, fancy via-in-pad, back-drilling. None of it applies at these speeds.

The failure modes on this board are mechanical and procedural — a wrong footprint, a backwards connector, a broken ground plane, a CPL rotation error. Not exotic signal integrity. Spend your attention accordingly.

8. A realistic schedule for the learning

Run this in parallel with firmware on the dev board and with procurement. None of the three block each other, and the long-lead components should already be on their way while you are watching videos.